Alif Semiconductor /AE722F80F55D5AS_CM55_HE_View /LPGPIO /GPIO_INTEN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GPIO_INTEN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)GPIO_INTEN

GPIO_INTEN=Val_0x0

Description

GPIO Port Interrupt Enable Register

Fields

GPIO_INTEN

Writing a 1 to a bit of this field configures the corresponding GPIO to become an interrupt signal. Interrupts are disabled on the corresponding bits if the corresponding bit of GPIO_SWPORTA_DDR[GPIO_SWPORTA_DDR] field is set to 1 (output). The generation of interrupts are disabled by default.

0 (Val_0x0): Interrupt is disabled

1 (Val_0x1): Interrupt is enabled

Links

() ()